US Patent Issued to Semiconductor Energy Laboratory on Sept. 1 for "Layout method for automatically generating circuit layout and control system for controlling layout arrangement of circuit generated over substrate" (Japanese Inventors)

Posted On: 2026-09-01

ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,945, issued on Sept. 1, was assigned to Semiconductor Energy Laboratory Co. Ltd. (Atsugi, Japan). "Layout method for automatically generati... Read More

US Patent Issued to Schlumberger Technology on Sept. 1 for "Fast front tracking in EOR flooding simulation on coarse grids" (British Inventors)

Posted On: 2026-09-01

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ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,946, issued on Sept. 1, was assigned to Schlumberger Technology Corp. (Sugar Land, Texas). "Fast front tracking in EOR flooding simulation ... Read More

US Patent Issued to Auradine on Sept. 1 for "Designing approximate adder circuits using reinforcement learning" (California Inventors)

Posted On: 2026-09-01

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ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,947, issued on Sept. 1, was assigned to Auradine Inc. (Santa Clara, Calif.). "Designing approximate adder circuits using reinforcement lear... Read More

US Patent Issued to Genesis Molecular AI on Sept. 1 for "Training generative machine learning models for 3D molecular structure prediction using alignment objectives" (California, New York, New Hampshire Inventors)

Posted On: 2026-09-01

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ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,948, issued on Sept. 1, was assigned to Genesis Molecular AI Inc. (San Diego). "Training generative machine learning models for 3D molecula... Read More

US Patent Issued to Hitachi on Sept. 1 for "Work support device, work support system, and analysis program" (Japanese Inventors)

Posted On: 2026-09-01

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ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,949, issued on Sept. 1, was assigned to Hitachi Ltd. (Tokyo). "Work support device, work support system, and analysis program" was invented... Read More

US Patent Issued to Synopsys on Sept. 1 for "Automatic waiver generation for filtering violations reported by static analysis" (Sri Lankan, American, Indian Inventors)

Posted On: 2026-09-01

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ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,950, issued on Sept. 1, was assigned to Synopsys Inc. (Sunnyvale, Calif.). "Automatic waiver generation for filtering violations reported b... Read More

US Patent Issued to Synopsys on Sept. 1 for "Real time view swapping (RTVS) in a mixed signal simulation" (Chinese, American Inventors)

Posted On: 2026-09-01

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ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,951, issued on Sept. 1, was assigned to Synopsys Inc. (Sunnyvale, Calif.). "Real time view swapping (RTVS) in a mixed signal simulation" wa... Read More

US Patent Issued to LITE-ON SINGAPORE on Sept. 1 for "Method for establishing optocoupler spice model" (Singaporean Inventors)

Posted On: 2026-09-01

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ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,952, issued on Sept. 1, was assigned to LITE-ON SINGAPORE PTE. LTD. (Singapore). "Method for establishing optocoupler spice model" was inve... Read More

US Patent Issued to International Business Machines on Sept. 1 for "Bit line alignment for the reduction of soft errors" (New York Inventors)

Posted On: 2026-09-01

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ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,953, issued on Sept. 1, was assigned to International Business Machines Corp. (Armonk, N.Y.). "Bit line alignment for the reduction of soft... Read More

US Patent Issued to Cadence Design Systems on Sept. 1 for "Fixing voltage drop violation based on timing and congestion" (Chinese Inventors)

Posted On: 2026-09-01

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ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,954, issued on Sept. 1, was assigned to Cadence Design Systems Inc. (San Jose, Calif.). "Fixing voltage drop violation based on timing and ... Read More

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US Patent Issued to Semiconductor Energy Laboratory on Sept. 1 for "Layout method for automatically generating circuit layout and control system for controlling layout arrangement of circuit generated over substrate" (Japanese Inventors)

US Patent Issued to Schlumberger Technology on Sept. 1 for "Fast front tracking in EOR flooding simulation on coarse grids" (British Inventors)

US Patent Issued to Auradine on Sept. 1 for "Designing approximate adder circuits using reinforcement learning" (California Inventors)

US Patent Issued to Genesis Molecular AI on Sept. 1 for "Training generative machine learning models for 3D molecular structure prediction using alignment objectives" (California, New York, New Hampshire Inventors)

US Patent Issued to Hitachi on Sept. 1 for "Work support device, work support system, and analysis program" (Japanese Inventors)

US Patent Issued to Synopsys on Sept. 1 for "Automatic waiver generation for filtering violations reported by static analysis" (Sri Lankan, American, Indian Inventors)

US Patent Issued to Synopsys on Sept. 1 for "Real time view swapping (RTVS) in a mixed signal simulation" (Chinese, American Inventors)

US Patent Issued to LITE-ON SINGAPORE on Sept. 1 for "Method for establishing optocoupler spice model" (Singaporean Inventors)

US Patent Issued to International Business Machines on Sept. 1 for "Bit line alignment for the reduction of soft errors" (New York Inventors)

US Patent Issued to Cadence Design Systems on Sept. 1 for "Fixing voltage drop violation based on timing and congestion" (Chinese Inventors)